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Substrate coupling in digital circuits in mixed-signal smart-power systems.
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Secareanu, R.M
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IEEE Transactions on VLSI systems
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A jitter characterization system using a component-invariant Vernier delay line.
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A 10-Gbps full-AES crypto design with a twisted BDD S-Box architecture.
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A framework for energy and transient power reduction during behavioral synthesis.
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Mohanty, S.P
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Gray, Paul R. 1942-
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Iniewski, Krzysztof 1960-
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Baker, R. Jacob 1964-
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