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Adding error-correcting circuitry to ASIC memory.
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Gray, K.
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Simulation of arsenic in situ doping with polysilicon CVD and its application to high aspect ratio trenches.
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Heitzinger, C.
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A self-controllable voltage level (SVL) circuit and its low-power high-speed CMOS circuit applications.
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Enomoto, T.
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IEEE Journal of solid state circuits
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A temperature-insensitive self-recharging circuitry used in DRAMs.
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Chua-Chin Wang
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A 4-kB 500-MHz 4-T CMOS SRAM using low-VTHN bitline drivers and high-VTHP latches.
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Chua-Chin Wang
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Block-based multiperiod dynamic memory design for low data-retention power.
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Joohee Kim
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DATABASE
Union Catalog (Buklod)
6 results
6
AUTHOR
Chua-Chin Wang
2 results
2
Enomoto, T.
1 results
1
Gray, K.
1 results
1
Heitzinger, C.
1 results
1
Joohee Kim
1 results
1
RESOURCE TYPE
Article
6 results
6
LANGUAGE
English
6 results
6
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