Showing 1,121 - 1,130 results of 1,208 for search '"Memorialization."', query time: 0.02s Refine Results
  1. 1121

    Demonstration of RSFQ digitizer on a multichip module. by Joonhee Kang

    Article

    Demonstration of RSFQ digitizer on a multichip module.
  2. 1122

    Pseudo-maximum-likelihood data estimation algorithm and its application over band-limited channels. by Sadjadpour, H.R

    Article

    Pseudo-maximum-likelihood data estimation algorithm and its application over band-limited channels.
  3. 1123

    Valuation of the effects of intersymbol interference in decision-feedback equalizers. by Willink, T.J

    Article

    Valuation of the effects of intersymbol interference in decision-feedback equalizers.
  4. 1124

    The effect of a precoder on serially concatenated coding systems with an ISI channel. by Inkyu Lee

    Article

    The effect of a precoder on serially concatenated coding systems with an ISI channel.
  5. 1125

    A multiple-valued logic and memory with combined single-electron and metal-oxide-semiconductor transistors. by Inokawa, H.

    Article

    A multiple-valued logic and memory with combined single-electron and metal-oxide-semiconductor transistors.
  6. 1126

    Fast maximum intensity projections of large medical data sets by exploiting hierarchical memory architectures. by Kiefer, G.

    Article

    Fast maximum intensity projections of large medical data sets by exploiting hierarchical memory architectures.
  7. 1127

    FAIR a hardware architecture for real-time 3-D image registration. by Castro-Pareja, C.R

    Article

    FAIR a hardware architecture for real-time 3-D image registration.
  8. 1128

    PET-CT image registration in the chest using free-form deformations. by Mattes, D.

    Article

    PET-CT image registration in the chest using free-form deformations.
  9. 1129

    A Case for Asymmetric-Cell Cache Memories. by Moshovos, A.

    Article

    A Case for Asymmetric-Cell Cache Memories.
  10. 1130

    A 4-kB 500-MHz 4-T CMOS SRAM using low-VTHN bitline drivers and high-VTHP latches. by Chua-Chin Wang

    Article

    A 4-kB 500-MHz 4-T CMOS SRAM using low-VTHN bitline drivers and high-VTHP latches.

Search Tools: