Mostrando 121 - 130 Resultados de 135 Para Buscar '"Logic circuit."', tiempo de consulta: 0.02s Limitar resultados
  1. 121

    Sleep switch dual threshold Voltage domino logic with reduced standby leakage current. por Kursun, V.

    Artículo

    Sleep switch dual threshold Voltage domino logic with reduced standby leakage current.
  2. 122

    Crosstalk noise reduction in synthesized digital logic circuits. por Milter, O.

    Artículo

    Crosstalk noise reduction in synthesized digital logic circuits.
  3. 123

    Power to the molecules [nanometer-size switch]. por Geppert, L.

    Publicado en IEEE spectrum
    Artículo

    Power to the molecules [nanometer-size switch].
  4. 124

    Power to the molecules [nanometer-size switch]. por Geppert, L.

    Publicado en IEEE spectrum
    Artículo

    Power to the molecules [nanometer-size switch].
  5. 125

    Power to the molecules [nanometer-size switch]. por Geppert, L.

    Publicado en IEEE spectrum
    Artículo

    Power to the molecules [nanometer-size switch].
  6. 126

    Level-shifter free design of low power dual supply voltage CMOS circuits using dual threshold voltages. por Diril, A.U

    Artículo

    Level-shifter free design of low power dual supply voltage CMOS circuits using dual threshold voltages.
  7. 127

    A self-controllable voltage level (SVL) circuit and its low-power high-speed CMOS circuit applications. por Enomoto, T.

    Artículo

    A self-controllable voltage level (SVL) circuit and its low-power high-speed CMOS circuit applications.
  8. 128

    A review of 0.18-μm full adder performances for tree structured arithmetic circuits. por Chip-Hong Chang

    Artículo

    A review of 0.18-μm full adder performances for tree structured arithmetic circuits.
  9. 129

    Power characteristics of inductive interconnect. por El-Moursy, M.A

    Artículo

    Power characteristics of inductive interconnect.
  10. 130

    A 32-bit carry lookahead adder using dual-path all-N logic. por Ge Yang

    Artículo

    A 32-bit carry lookahead adder using dual-path all-N logic.

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