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121
Sleep switch dual threshold Voltage domino logic with reduced standby leakage current.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua -
122
Crosstalk noise reduction in synthesized digital logic circuits.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua -
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128
A review of 0.18-μm full adder performances for tree structured arithmetic circuits.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua -
129
Power characteristics of inductive interconnect.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua -
130
A 32-bit carry lookahead adder using dual-path all-N logic.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua