Showing 91 - 100 results of 131 for search '"Locks."', query time: 0.02s Refine Results
  1. 91

    A slew-rate controlled output driver using PLL as compensation circuit. by Soon-Kyun Shin

    Article

    A slew-rate controlled output driver using PLL as compensation circuit.
  2. 92

    A triple-mode continuous-time ΣΔ modulator with switched-capacitor feedback DAC for a GSM-EDGE/CDMA2000 by Van Veldhoven, R.H.M

    Article

    A triple-mode continuous-time ΣΔ modulator with switched-capacitor feedback DAC for a GSM-EDGE/CDMA2000
  3. 93

    A second-order semidigital clock recovery circuit based on injection locking. by Hiok-Tiaq Ng

    Article

    A second-order semidigital clock recovery circuit based on injection locking.
  4. 94

    A fully integrated zero-IF transceiver for GSM-GPRS quad-band application. by Duvivier, E.

    Article

    A fully integrated zero-IF transceiver for GSM-GPRS quad-band application.
  5. 95

    Techniques for phase noise suppression in recirculating DLLs. by Sheng Ye

    Article

    Techniques for phase noise suppression in recirculating DLLs.
  6. 96

    A 39-to-45-Gbit by Nosaka, H.

    Article

    A 39-to-45-Gbit
  7. 97

    A 20-GHz phase-locked loop for 40-gb by Jaeha Kim

    Article

    A 20-GHz phase-locked loop for 40-gb
  8. 98

    Hit the road, Mac. by Ayers, Leslie

    Published in Mac life
    Article

    Hit the road, Mac.
  9. 99

    Anti-hangup binary quantized DPLL technique for timing recovery in QAM symbol-rate sampled receivers. by Panayiotopoulos, I.

    Article

    Anti-hangup binary quantized DPLL technique for timing recovery in QAM symbol-rate sampled receivers.
  10. 100

    Parameterized hysteresis model for high-temperature superconductors. by Sjostrom, M.

    Article

    Parameterized hysteresis model for high-temperature superconductors.

Search Tools: