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1961
Digital logic design using Verilog coding and RTL synthesis
Publicat 2016Available for University of the Philippines System via SpringerLink. Click here to access
Also available remotely for University of the Philippines System via SpringerLink. Click here to access thru EZproxy
Electronic Resource -
1962
-
1963
Engineering safe and secure cyber-physical systems the specification PEARL approach
Publicat 2016Available for University of the Philippines System via SpringerLink. Click here to access
Also available remotely for University of the Philippines System via SpringerLink. Click here to access thru EZproxy
Electronic Resource -
1964
-
1965
Languages, design methods, and tools for electronic system design selected contributions from FDL 2014
Publicat 2016Available for University of the Philippines System via SpringerLink. Click here to access
Also available remotely for University of the Philippines System via SpringerLink. Click here to access thru EZproxy
Electronic Resource -
1966
Languages, design methods, and tools for electronic system design selected contributions from FDL 2015
Publicat 2016Available for University of the Philippines System via SpringerLink. Click here to access
Also available remotely for University of the Philippines System via SpringerLink. Click here to access thru EZproxy
Electronic Resource -
1967
-
1968
-
1969
SystemVerilog assertions and functional coverage guide to language, methodology and applications
Publicat 2016Available for University of the Philippines System via SpringerLink. Click here to access
Also available remotely for University of the Philippines System via SpringerLink. Click here to access thru EZproxy
Electronic Resource -
1970


