- 
              
            3611POMR a power-aware interconnect optimization methodology.Pubblicato in IEEE Transactions on VLSI systemsArticolo
- 
              
            3612
- 
              
            3613Design of a 3-D fully depleted SOI computational RAM.Pubblicato in IEEE Transactions on VLSI systemsArticolo
- 
              
            3614Shielding effect of on-chip interconnect inductance.Pubblicato in IEEE Transactions on VLSI systemsArticolo
- 
              
            3615
- 
              
            3616Design of wireless on-wafer submicron characterization system.Pubblicato in IEEE Transactions on VLSI systemsArticolo
- 
              
            3617
- 
              
            3618
- 
              
            3619
- 
              
            3620