Search Results - "Integrated circuits Verification"

SystemVerilog assertions and functional coverage guide to language, methodology and applications by Mehta, Ashok B.

Available for University of the Philippines System via SpringerLink. Click here to access
Also available remotely for University of the Philippines System via SpringerLink. Click here to access thru EZproxy

System Verilog assertions and functional coverage guide to language, methodology and applications by Mehta, Ashok B.

Available for University of the Philippines Diliman via SpringerLink. Click here to access
Also available remotely for University of the Philippines Diliman via SpringerLink. Click here to access thru EZproxy

Authentication of embedded devices technologies, protocols and emerging applications

Also available remotely for the University of the Philippines System via SpringerLink. Click here to access thru EZproxy
Available for University of the Philippines System via SpringerLink. Click here to access

Digital timing macromodeling for VLSI design verification by Kong, Jeong-Taek 1959-

Correct hardware design and verification methods IFIP WG10.5 advanced research working conference, CHARME 95, Frankfurt/Main, Germany, October 2-4, 1995 : proceedings