Отображение 791 - 800 результаты of 831 для поиска '"Integrated circuit."', время запроса: 0.02сек. Отмена результатов
  1. 791

    A low-power DSP core-based software radio architecture. по Gunn, J.E

    Статья

    A low-power DSP core-based software radio architecture.
  2. 792

    Adaptive antenna arrays and equalization techniques for high bit-rate QAM receivers. по Jind-Yeh Lee

    Статья

    Adaptive antenna arrays and equalization techniques for high bit-rate QAM receivers.
  3. 793

    No place to hide [radar devices]. по Jones, W.D

    Опубликовано в: IEEE spectrum
    Статья

    No place to hide [radar devices].
  4. 794

    Packages go vertical. по Goldstein, H.

    Опубликовано в: IEEE spectrum
    Статья

    Packages go vertical.
  5. 795

    RF bridges to the network [RF IC design]. по Geppert, L.

    Опубликовано в: IEEE spectrum
    Статья

    RF bridges to the network [RF IC design].
  6. 796

    Superconductor ICs the 100-GHz second generation. по Brock, D.K

    Опубликовано в: IEEE spectrum
    Статья

    Superconductor ICs the 100-GHz second generation.
  7. 797

    2.5-dimensional VLSI system integration. по Yangdong Deng

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    2.5-dimensional VLSI system integration.
  8. 798

    A review of 0.18-μm full adder performances for tree structured arithmetic circuits. по Chip-Hong Chang

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    A review of 0.18-μm full adder performances for tree structured arithmetic circuits.
  9. 799

    Nine-coded compression technique for testing embedded cores in SoCs. по Tehranipoor, M.

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    Nine-coded compression technique for testing embedded cores in SoCs.
  10. 800

    A novel yield optimization technique for digital CMOS circuits design by means of process parameters run-time estimation and body bias active control. по Olivieri, M.

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    A novel yield optimization technique for digital CMOS circuits design by means of process parameters run-time estimation and body bias active control.

Инструменты поиска: