檢索結果 - "Integrated circuit testing."

Refine Results
  1. 21

    Design of a 3-D fully depleted SOI computational RAM. 由 Koob, J.C

    Article


    封面圖片
  2. 22

    Nine-coded compression technique for testing embedded cores in SoCs. 由 Tehranipoor, M.

    Article


    封面圖片
  3. 23

    Design of wireless on-wafer submicron characterization system. 由 Moore, B.

    Article


    封面圖片

檢索工具: