検索結果 - "Integrated circuit testing."

Digital integrated circuits design-for-test using Simulink and Stateflow 著者: Perelroyzen, Evgeni

Accelerating test, validation and debug of high speed serial interfaces 著者: Fan, Yongquan 1970-

Available for University of the Philippines Diliman via SpringerLink. Click here to access

Design for testability, debug and reliability next generation measures using formal techniques 著者: Huhn, Sebastian, Drechsler, Rolf

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Analog signal generation for built-in-self-test of mixed-signal integrated circuits 著者: Roberts, Gordon W., 1959-

Digital system test and testable design using HDL models and architectures 著者: Navabi, Zainalabedin

Available for University of the Philippines Diliman via SpringerLink. Click here to access

Synchronization overhead in SOC compressed test. 著者: Gonciari, P.T

RF measurements for cellular phones and wireless data systems 著者: Scott, Allan W.

Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits 著者: Bushnell, Michael L. (Michael Lee) 1950-

Also available online for University of the Philippines Diliman College of Engineering via Springer. Click here to access

Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits 著者: Bushnell, Michael L. (Michael Lee) 1950-, Agrawal, Vishwani D. 1943-

Available for University of the Philippines System via SpringerLink. Click here to access
Also available remotely for University of the Philippines System via SpringerLink. Click here to access thru EZproxy

POMR a power-aware interconnect optimization methodology. 著者: Youssef, A.