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"ISCAS89 benchmark circuits."
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Path delay fault diagnosis and coverage-a metric and an estimation technique.
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Sivaraman, M.
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IEEE Transactions on computer-aided design of integrated circuits and systems
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Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits.
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Taskin, B.
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IEEE Transactions on VLSI systems
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Design and analysis of compact dictionaries for diagnosis in scan-BIST.
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Chunsheng Liu
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IEEE Transactions on VLSI systems
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DATABASE
Union Catalog (Buklod)
3 results
3
AUTHOR
Chunsheng Liu
1 results
1
Sivaraman, M.
1 results
1
Taskin, B.
1 results
1
RESOURCE TYPE
Article
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English
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