Showing 231 - 240 results of 249 for search '"Hardware."', query time: 0.02s Refine Results
  1. 231

    Digital filter synthesis based on an algorithm to generate all minimal signed digit representations. by In-Cheol Park

    Article

    Digital filter synthesis based on an algorithm to generate all minimal signed digit representations.
  2. 232

    Algorithm level recomputing using allocation diversity a register transfer level approach to time redundancy-based concurrent error detection. by Kaijie Wu

    Article

    Algorithm level recomputing using allocation diversity a register transfer level approach to time redundancy-based concurrent error detection.
  3. 233

    Testing of core-based systems-on-a-chip. by Ravi, S.

    Article

    Testing of core-based systems-on-a-chip.
  4. 234

    A digital vision chip specialized for high-speed target tracking. by Komuro, T.

    Article

    A digital vision chip specialized for high-speed target tracking.
  5. 235

    FAIR a hardware architecture for real-time 3-D image registration. by Castro-Pareja, C.R

    Article

    FAIR a hardware architecture for real-time 3-D image registration.
  6. 236

    A real-time hardware fault detector using an artificial neural network for distance protection. by Venkatesan, R.

    Article

    A real-time hardware fault detector using an artificial neural network for distance protection.
  7. 237

    Extended-range PMSM sensorless speed drive based on stochastic filtering. by Bolognani, S.

    Article

    Extended-range PMSM sensorless speed drive based on stochastic filtering.
  8. 238

    Input space adaptive design a high-level methodology for optimizing energy and performance. by Weidong Wang

    Article

    Input space adaptive design a high-level methodology for optimizing energy and performance.
  9. 239

    Efficient metrics and high-level synthesis for dynamically reconfigurable logic. by Meribout, M.

    Article

    Efficient metrics and high-level synthesis for dynamically reconfigurable logic.
  10. 240

    Pel reconstruction on FPGA-augmented TriMedia. by Sima, M.

    Article

    Pel reconstruction on FPGA-augmented TriMedia.

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