Εμφανίζονται 61 - 70 Αποτελέσματα από 98 για την αναζήτηση '"Field programmable gate array."', χρόνος αναζήτησης: 0,02δλ Περιορισμός αποτελεσμάτων
  1. 61

    A novel FPGA architecture supporting wide, shallow memories. ανά Oldridge, S.W

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    A novel FPGA architecture supporting wide, shallow memories.
  2. 62

    Virtex FPGA implementation of a pipelined adaptive LMS predictor for electronic support measures receivers. ανά Lok-Kee Ting

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Virtex FPGA implementation of a pipelined adaptive LMS predictor for electronic support measures receivers.
  3. 63

    Layout techniques for FPGA switch blocks. ανά Schmit, H.

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Layout techniques for FPGA switch blocks.
  4. 64

    Online BIST and BIST-based diagnosis of FPGA logic blocks. ανά Abramovici, M.

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Online BIST and BIST-based diagnosis of FPGA logic blocks.
  5. 65

    Interconnect accelerating techniques for sub-100-nm gigascale systems. ανά Hong-Yi Huang

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Interconnect accelerating techniques for sub-100-nm gigascale systems.
  6. 66

    Power estimation techniques for FPGAs. ανά Anderson, J.H

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Power estimation techniques for FPGAs.
  7. 67

    Sequential delay budgeting with interconnect prediction. ανά Chao-Yang Yeh

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Sequential delay budgeting with interconnect prediction.
  8. 68

    Design of FPGA interconnect for multilevel metallization. ανά DeHon, A.

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Design of FPGA interconnect for multilevel metallization.
  9. 69

    Unifying mesh- and tree-based programmable interconnect. ανά DeHon, A.

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Unifying mesh- and tree-based programmable interconnect.
  10. 70

    Highly efficient, limited range multipliers for LUT-based FPGA architectures. ανά Turner, R.H

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Highly efficient, limited range multipliers for LUT-based FPGA architectures.

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