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A fuzzy model for path delay fault detection.
I publikationen IEEE Transactions on VLSI systemsArtikel -
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Analytical test buffer design for differential signaling I
I publikationen IEEE Transactions on VLSI systemsArtikel -
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Low-power scan design using first-level supply gating.
I publikationen IEEE Transactions on VLSI systemsArtikel -
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Implicit deductive fault simulation for complex delay fault models.
I publikationen IEEE Transactions on VLSI systemsArtikel