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Latchup-free ESD protection design with complementary substrate-triggered SCR devices.
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Ming-Dou Ker
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IEEE Journal of solid state circuits
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Substrate-triggered SCR device for on-chip ESD protection in fully silicided sub-0.25-μm CMOS process.
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Ming-Dou Ker
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IEEE Transactions on electron devices
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Design on ESD protection scheme for IC with power-down-mode operation.
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Ming-Dou Ker
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IEEE Journal of solid state circuits
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Chip-level charged-device modeling and simulation in CMOS integrated circuits.
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Jaesik Lee
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IEEE Transactions on computer-aided design of integrated circuits and systems
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Implementation of a comprehensive and robust MOSFET model in cadence SPICE for ESD applications.
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Gao, X.F
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IEEE Transactions on computer-aided design of integrated circuits and systems
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DATABASE
Union Catalog (Buklod)
5 results
5
AUTHOR
Ming-Dou Ker
3 results
3
Gao, X.F
1 results
1
Jaesik Lee
1 results
1
RESOURCE TYPE
Article
5 results
5
LANGUAGE
English
5 results
5
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