Search Results - "Designers"

12641

Automatic generation of subword units for speech recognition systems. by Singh, R.

Published in IEEE Transactions on speech and audio processing

Article

Automatic generation of subword units for speech recognition systems.

12642

Efficient model fitting using a genetic algorithm pole-zero approximations of HRTFs. by Durant, E.A

Published in IEEE Transactions on speech and audio processing

Article

Efficient model fitting using a genetic algorithm pole-zero approximations of HRTFs.

12643

DCG deterministic clock-gating for low-power microprocessor design. by Hai Li

Published in IEEE Transactions on VLSI systems

Article

DCG deterministic clock-gating for low-power microprocessor design.

12644

The effect of LUT and cluster size on deep-submicron FPGA performance and density. by Ahmed, E.

Published in IEEE Transactions on VLSI systems

Article

The effect of LUT and cluster size on deep-submicron FPGA performance and density.

12645

Connecting the quantum dots. by Sargent, E.H

Published in IEEE spectrum

Article

12646

Fixed-outline floorplanning enabling hierarchical design. by Adya, S.N

Published in IEEE Transactions on VLSI systems

Article

Fixed-outline floorplanning enabling hierarchical design.

12647

A clock interconnect extractor for multigigahertz frequencies incorporating inductance effect. by Azadpour, M.A

Published in IEEE Transactions on VLSI systems

Article

A clock interconnect extractor for multigigahertz frequencies incorporating inductance effect.

12648

Trellis-coded unitary space-time modulation. by Bahceci, I.

Published in IEEE Transactions on wireless communications

Article

Trellis-coded unitary space-time modulation.

12649

DreamJobs 2007. by Goldstein, Harry

Published in IEEE spectrum

Article

12650

MOS current mode circuits analysis, design, and variability. by Hassan, H.

Published in IEEE Transactions on VLSI systems

Article

Automatic generation of subword units for speech recognition systems. by Singh, R.

Efficient model fitting using a genetic algorithm pole-zero approximations of HRTFs. by Durant, E.A

DCG deterministic clock-gating for low-power microprocessor design. by Hai Li

The effect of LUT and cluster size on deep-submicron FPGA performance and density. by Ahmed, E.

Connecting the quantum dots. by Sargent, E.H

Fixed-outline floorplanning enabling hierarchical design. by Adya, S.N

A clock interconnect extractor for multigigahertz frequencies incorporating inductance effect. by Azadpour, M.A

Trellis-coded unitary space-time modulation. by Bahceci, I.

DreamJobs 2007. by Goldstein, Harry

MOS current mode circuits analysis, design, and variability. by Hassan, H.

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