Search Results - "Designers"

12621

Error-correction and crosstalk avoidance in DSM busses. by Patel, K.N

Published in IEEE Transactions on VLSI systems

Article

Error-correction and crosstalk avoidance in DSM busses.

12622

Assessment of on-chip wire-length distribution models. by Lanzerotti, M.Y

Published in IEEE Transactions on VLSI systems

Article

Assessment of on-chip wire-length distribution models.

12623

Effects of speculation on performance and issue queue design. by Moreshet, T.

Published in IEEE Transactions on VLSI systems

Article

Effects of speculation on performance and issue queue design.

12624

Critical evaluation of SOI design guidelines. by Kanj, R.

Published in IEEE Transactions on VLSI systems

Article

Critical evaluation of SOI design guidelines.

12625

Combining a performance estimation methodology with a hardware by Baghdadi, A.

Published in IEEE Transactions on software engineering

Article

Combining a performance estimation methodology with a hardware

12626

Virtual benchmarking and model continuity in prototyping embedded multiprocessor signal processing systems. by Janka, R.S

Published in IEEE Transactions on software engineering

Article

Virtual benchmarking and model continuity in prototyping embedded multiprocessor signal processing systems.

12627

Reconfigurable instruction set processors from a hardware by Barat, F.

Published in IEEE Transactions on software engineering

Article

Reconfigurable instruction set processors from a hardware

12628

High performance level conversion for dual VDD design. by Kulkarni, S.H

Published in IEEE Transactions on VLSI systems

Article

High performance level conversion for dual VDD design.

12629

A hierarchical model for object-oriented design quality assessment. by Bansiya, J.

Published in IEEE Transactions on software engineering

Article

A hierarchical model for object-oriented design quality assessment.

12630

Distributed sleep transistor network for power reduction. by Changbo Long

Published in IEEE Transactions on VLSI systems

Article

Error-correction and crosstalk avoidance in DSM busses. by Patel, K.N

Assessment of on-chip wire-length distribution models. by Lanzerotti, M.Y

Effects of speculation on performance and issue queue design. by Moreshet, T.

Critical evaluation of SOI design guidelines. by Kanj, R.

Combining a performance estimation methodology with a hardware by Baghdadi, A.

Virtual benchmarking and model continuity in prototyping embedded multiprocessor signal processing systems. by Janka, R.S

Reconfigurable instruction set processors from a hardware by Barat, F.

High performance level conversion for dual VDD design. by Kulkarni, S.H

A hierarchical model for object-oriented design quality assessment. by Bansiya, J.

Distributed sleep transistor network for power reduction. by Changbo Long

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