A mostrar 13,551 - 13,560 resultados de 13,981 para a pesquisa '"Design."', tempo de pesquisa: 0.05seg Refinar resultados
  1. 13551

    Substrate coupling in digital circuits in mixed-signal smart-power systems. Por Secareanu, R.M

    Artigo

    Substrate coupling in digital circuits in mixed-signal smart-power systems.
  2. 13552

    A jitter characterization system using a component-invariant Vernier delay line. Por Chan, A.H

    Artigo

    A jitter characterization system using a component-invariant Vernier delay line.
  3. 13553

    On-chip traffic modeling and synthesis for MPEG-2 video applications. Por Varatkar, G.V

    Artigo

    On-chip traffic modeling and synthesis for MPEG-2 video applications.
  4. 13554

    Statistical prosodic modeling from corpus design to parameter estimation. Por Bellegarda, J.R

    Artigo

    Statistical prosodic modeling from corpus design to parameter estimation.
  5. 13555

    An overview of the competitive and adversarial approaches to designing dynamic power management strategies. Por Irani, S.

    Artigo

    An overview of the competitive and adversarial approaches to designing dynamic power management strategies.
  6. 13556

    Bus encoding for total power reduction using a leakage-aware buffer configuration. Por Rao, R.R

    Artigo

    Bus encoding for total power reduction using a leakage-aware buffer configuration.
  7. 13557

    Test pattern generation and partial-scan methodology for an asynchronous SoC interconnect. Por Efthymiou, A.

    Artigo

    Test pattern generation and partial-scan methodology for an asynchronous SoC interconnect.
  8. 13558

    Chip Design Hardwires Security. Por Adee, S.

    Publicado no IEEE spectrum
    Artigo

    Chip Design Hardwires Security.
  9. 13559

    Efficient testing of SRAM with optimized march sequences and a novel DFT technique for emerging failures due to process variations. Por Qikai Chen

    Artigo

    Efficient testing of SRAM with optimized march sequences and a novel DFT technique for emerging failures due to process variations.
  10. 13560

    Design of a 1.7-GHz low-power delay-fault-testable 32-b ALU in 180-nm CMOS technology. Por Chatterjee, B.

    Artigo

    Design of a 1.7-GHz low-power delay-fault-testable 32-b ALU in 180-nm CMOS technology.

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