Mostrar 1 - 6 resultats de 6 per cerca '"Delayed lock loop."', hora de la petició: 0.02sec Refinar resultats
  1. 1

    A second-order semidigital clock recovery circuit based on injection locking. per Hiok-Tiaq Ng

    Article

    A second-order semidigital clock recovery circuit based on injection locking.
  2. 2

    Techniques for phase noise suppression in recirculating DLLs. per Sheng Ye

    Article

    Techniques for phase noise suppression in recirculating DLLs.
  3. 3

    Performance analysis of noncoherent digital delay locked loops for direct sequence spread spectrum systems with Doppler shift and quantized adaptation. per Wern-Ho Sheen

    Article

    Performance analysis of noncoherent digital delay locked loops for direct sequence spread spectrum systems with Doppler shift and quantized adaptation.
  4. 4

    40-43-Gb/s OC-768 16 1 MUX per Hai Tao

    Article

    40-43-Gb/s OC-768 16 1 MUX
  5. 5

    A 1.2 GHz programmable DLL-based frequency multiplier for wireless applications. per Chua-Chin Wang

    Article

    A 1.2 GHz programmable DLL-based frequency multiplier for wireless applications.
  6. 6

    Design-for-testability for embedded delay-locked loops. per Egan, T.

    Article

    Design-for-testability for embedded delay-locked loops.

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