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41
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42
Twin-stack decoding of recursive systematic convolutional codes.
I publikationen IEEE Transactions on communicationsArtikel -
43
Synchronization overhead in SOC compressed test.
I publikationen IEEE Transactions on VLSI systemsArtikel -
44
VLSI implementation of new arithmetic residue to binary decoders.
I publikationen IEEE Transactions on VLSI systemsArtikel -
45
Design and implementation of low-energy turbo decoders.
I publikationen IEEE Transactions on VLSI systemsArtikel -
46
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47
DCG deterministic clock-gating for low-power microprocessor design.
I publikationen IEEE Transactions on VLSI systemsArtikel -
48
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49
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50