Dangos 1 - 7 canlyniadau o 7 ar gyfer chwilio '"DFT."', amser ymholiad: 0.01e Mireinio'r Canlyniadau
  1. 1

    Test pattern generation and clock disabling for simultaneous test time and power reduction. gan Jih-Jeen Chen

    Erthygl

    Test pattern generation and clock disabling for simultaneous test time and power reduction.
  2. 2

    Analysis of low-complexity windowed DFT-based MMSE channel estimator for OFDM systems. gan Baoguo Yang

    Erthygl

    Analysis of low-complexity windowed DFT-based MMSE channel estimator for OFDM systems.
  3. 3

    The swiss army knife of digital networks. gan Lyons, R.

    Erthygl

    The swiss army knife of digital networks.
  4. 4

    Test data compression technique for embedded cores using virtual scan chains. gan Jas, A.

    Erthygl

    Test data compression technique for embedded cores using virtual scan chains.
  5. 5

    Layout driven synthesis of multiple scan chains. gan Rahimi, K.

    Erthygl

    Layout driven synthesis of multiple scan chains.
  6. 6

    Testing ASICs with multiple identical cores. gan Yuejian Wu

    Erthygl

    Testing ASICs with multiple identical cores.
  7. 7

    Handling the pin overhead problem of DFTs for high-quality and at-speed tests. gan Dong Xiang

    Erthygl

    Handling the pin overhead problem of DFTs for high-quality and at-speed tests.

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