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Test data compression technique for embedded cores using virtual scan chains.
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Jas, A.
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IEEE Transactions on VLSI systems
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Layout driven synthesis of multiple scan chains.
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Rahimi, K.
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IEEE Transactions on computer-aided design of integrated circuits and systems
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Testing ASICs with multiple identical cores.
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Yuejian Wu
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IEEE Transactions on computer-aided design of integrated circuits and systems
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DATABASE
Union Catalog (Buklod)
3 results
3
AUTHOR
Jas, A.
1 results
1
Rahimi, K.
1 results
1
Yuejian Wu
1 results
1
RESOURCE TYPE
Article
3 results
3
LANGUAGE
English
3 results
3
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