<?xml version="1.0" encoding="UTF-8"?>
<?xml-stylesheet type="text/xsl" href="/themes/root/assets/xsl/rss.xsl"?>
<rss version="2.0" xmlns:opensearch="http://a9.com/-/spec/opensearch/1.1/" xmlns:atom="http://www.w3.org/2005/Atom" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/">
  <channel>
    <title>Results for "Computer software Verification"</title>
    <description>Showing 1 - 44 results of 44</description>
    <generator>Laminas_Feed_Writer 2 (https://getlaminas.org)</generator>
    <link>https://tuklas.up.edu.ph/Search/Results?sort=last_indexed+desc&amp;limit=50&amp;lookfor=%22Computer+software+Verification%22&amp;type=Subject&amp;lng=en</link>
    <opensearch:totalResults>44</opensearch:totalResults>
    <opensearch:startIndex>0</opensearch:startIndex>
    <opensearch:itemsPerPage>50</opensearch:itemsPerPage>
    <opensearch:Query role="request" searchTerms="%22Computer%20software%20Verification%22" startIndex="0"/>
    <atom:link rel="first" type="application/rss+xml" title="Go to First Page" href="https://tuklas.up.edu.ph/Search/Results?sort=last_indexed+desc&amp;limit=50&amp;view=rss&amp;lookfor=%22Computer+software+Verification%22&amp;type=Subject&amp;lng=en"/>
    <atom:link rel="last" type="application/rss+xml" title="Go to Last Page" href="https://tuklas.up.edu.ph/Search/Results?sort=last_indexed+desc&amp;limit=50&amp;view=rss&amp;lookfor=%22Computer+software+Verification%22&amp;type=Subject&amp;lng=en&amp;page=1"/>
    <atom:link rel="self" type="application/rss+xml" href="https://tuklas.up.edu.ph/Search/Results?sort=last_indexed+desc&amp;limit=50&amp;view=rss&amp;lookfor=%22Computer+software+Verification%22&amp;type=Subject&amp;lng=en"/>
    <item>
      <title>Asynchronous circuit applications</title>
      <pubDate>Tue, 01 Jan 2019 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217613765211</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217613765211</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2019</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Principles of model checking</title>
      <pubDate>Tue, 01 Jan 2008 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217608810051</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217608810051</guid>
      <author>Baier, Christel</author>
      <dc:format>Book</dc:format>
      <dc:date>2008</dc:date>
      <dc:creator>Baier, Christel</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Verification of systems and circuits using LOTOS, Petri Nets, and CCS</title>
      <pubDate>Tue, 01 Jan 2008 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217608914100</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217608914100</guid>
      <author>Yoeli, Michael 1917-</author>
      <dc:format>Book</dc:format>
      <dc:date>2008</dc:date>
      <dc:creator>Yoeli, Michael 1917-</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>SysML for systems engineering a model-based approach</title>
      <pubDate>Mon, 01 Jan 2018 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217613785935</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217613785935</guid>
      <author>Holt, Jon</author>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2018</dc:date>
      <dc:creator>Holt, Jon</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Model-based requirements engineering</title>
      <pubDate>Sun, 01 Jan 2012 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217612476991</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217612476991</guid>
      <author>Holt, Jon</author>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2012</dc:date>
      <dc:creator>Holt, Jon</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>SysML for systems engineering a model-based approach</title>
      <pubDate>Tue, 01 Jan 2013 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217612476992</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217612476992</guid>
      <author>Holt, Jon</author>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2013</dc:date>
      <dc:creator>Holt, Jon</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Languages, design methods, and tools for electronic system design selected contributions from FDL 2014</title>
      <pubDate>Fri, 01 Jan 2016 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217613033911</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217613033911</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2016</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Languages, design methods, and tools for electronic system design selected contributions from FDL 2015</title>
      <pubDate>Fri, 01 Jan 2016 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217613033912</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217613033912</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2016</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Software inspection an industry best practice</title>
      <pubDate>Mon, 01 Jan 1996 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217603084174</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217603084174</guid>
      <author>Wheeler, David A.</author>
      <dc:format>Book</dc:format>
      <dc:date>1996</dc:date>
      <dc:creator>Wheeler, David A.</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Independent verification and validation a life cycle engineering process for quality software</title>
      <pubDate>Wed, 01 Jan 1992 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217603051533</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217603051533</guid>
      <author>Lewis, Robert O. 1938-</author>
      <dc:format>Book</dc:format>
      <dc:date>1992</dc:date>
      <dc:creator>Lewis, Robert O. 1938-</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>HILT 2014 proceedings of the ACM Conference on High Integrity Language Technology : October 18-21, 2014, Portland, OR, USA</title>
      <pubDate>Wed, 01 Jan 2014 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611899743</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611899743</guid>
      <dc:format>Book</dc:format>
      <dc:date>2014</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>HILT '12 proceedings of the ACM Conference on High Integrity Language Technology : December 2-6, 2012, Boston, Massachusetts</title>
      <pubDate>Sun, 01 Jan 2012 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611459936</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611459936</guid>
      <dc:format>Book</dc:format>
      <dc:date>2012</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>HILT '13 proceedings of the ACM Conference on High Integrity Language Technology : November 10-14, 2013, Pittsburgh, PA, USA</title>
      <pubDate>Tue, 01 Jan 2013 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611459940</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611459940</guid>
      <dc:format>Book</dc:format>
      <dc:date>2013</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Languages, design methods, and tools for electronic system design selected contributions from FDL 2013</title>
      <pubDate>Thu, 01 Jan 2015 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217612770466</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217612770466</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2015</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Formal verification of Simulink/Stateflow diagrams a deductive approach</title>
      <pubDate>Sun, 01 Jan 2017 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217613140636</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217613140636</guid>
      <author>Zhan, Naijun</author>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2017</dc:date>
      <dc:creator>Zhan, Naijun</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Data flow analysis theory and practice</title>
      <pubDate>Thu, 01 Jan 2009 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217609243822</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217609243822</guid>
      <author>Khedker, Uday</author>
      <dc:format>Book</dc:format>
      <dc:date>2009</dc:date>
      <dc:creator>Khedker, Uday</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Software engineering reviews and audits</title>
      <pubDate>Sat, 01 Jan 2011 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217610089525</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217610089525</guid>
      <author>Summers, Boyd L.</author>
      <dc:format>Book</dc:format>
      <dc:date>2011</dc:date>
      <dc:creator>Summers, Boyd L.</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Automated validation &amp; verification of UML/OCL models using satisfiability solvers</title>
      <pubDate>Mon, 01 Jan 2018 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217613352383</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217613352383</guid>
      <author>Przigoda, Nils</author>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2018</dc:date>
      <dc:creator>Przigoda, Nils</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Formal system verification state-of-the-art and future trends</title>
      <pubDate>Mon, 01 Jan 2018 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217613297928</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217613297928</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2018</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Languages, design methods, and tools for electronic system design selected contributions from FDL 2016</title>
      <pubDate>Mon, 01 Jan 2018 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217613314001</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217613314001</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2018</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Formal methods for industrial critical systems 16th International Workshop, FMICS 2011, Trento, Italy, August 29-30, 2011. Proceedings</title>
      <pubDate>Sat, 01 Jan 2011 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611115636</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611115636</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2011</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Verification, validation and testing in software engineering</title>
      <pubDate>Mon, 01 Jan 2007 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217608565749</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217608565749</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2007</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Foundations of computer software. Modeling, development, and verification of adaptive systems 16th Monterey Workshop 2010, Redmond, WA, USA, March 31- April 2, 2010, Revised Selected Papers</title>
      <pubDate>Sat, 01 Jan 2011 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611115665</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611115665</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2011</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Formal modeling: actors, open systems, biological systems essays dedicated to Carolyn Talcott on the occasion of her 70th Birthday</title>
      <pubDate>Sat, 01 Jan 2011 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611115646</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611115646</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2011</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Formal verification of object-oriented software International Conference, FoVeOOS 2010, Paris, France, June 28-30, 2010, Revised Selected Papers</title>
      <pubDate>Sat, 01 Jan 2011 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611115648</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611115648</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2011</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Model checking and artificial intelligence 6th International Workshop, MoChArt 2010, Atlanta, GA, USA, July 11, 2010, Revised Selected and Invited Papers</title>
      <pubDate>Sat, 01 Jan 2011 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611135138</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611135138</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2011</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Model checking software 18th International SPIN Workshop, Snowbird, UT, USA, July 14-15, 2011. Proceedings</title>
      <pubDate>Sat, 01 Jan 2011 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611135139</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611135139</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2011</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Hardware and software: verification and testing 5th International Haifa Verification Conference, HVC 2009, Haifa, Israel, October 19-22, 2009, revised selected papers</title>
      <pubDate>Sat, 01 Jan 2011 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611116144</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611116144</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2011</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Hardware and software: verification and testing 6th International Haifa Verification Conference, HVC 2010, Haifa, Israel, October 4-7, 2010: revised selected papers</title>
      <pubDate>Sat, 01 Jan 2011 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611116145</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611116145</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2011</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Rigorous Software Development An Introduction to Program Verification</title>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611154662</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611154662</guid>
      <author>Almeida, José Bacelar</author>
      <dc:format>Electronic Resource</dc:format>
      <dc:creator>Almeida, José Bacelar</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>NASA formal methods third international symposium, NFM 2011, Pasadena, CA, USA, April 18-20, 2011. Proceedings</title>
      <pubDate>Sat, 01 Jan 2011 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611135173</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611135173</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2011</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Extensions of the UNITY methodology compositionality, fairness, and probability in parallelism</title>
      <pubDate>Sun, 01 Jan 1995 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217603068375</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217603068375</guid>
      <author>Rao, Josyula Ramachandra 1962-</author>
      <dc:format>Book</dc:format>
      <dc:date>1995</dc:date>
      <dc:creator>Rao, Josyula Ramachandra 1962-</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Verification and validation of rule-based expert systems</title>
      <pubDate>Fri, 01 Jan 1993 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217603084006</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217603084006</guid>
      <author>Smith, Suzanne 1953-</author>
      <dc:format>Book</dc:format>
      <dc:date>1993</dc:date>
      <dc:creator>Smith, Suzanne 1953-</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Software verification and analysis an integrated, hands-on approach</title>
      <pubDate>Thu, 01 Jan 2009 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217609164587</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217609164587</guid>
      <author>Laski, Janusz</author>
      <dc:format>Book</dc:format>
      <dc:date>2009</dc:date>
      <dc:creator>Laski, Janusz</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Computer aided verification 4th international workshop, CAV '92, Montreal, Canada, June 29 - July 1, 1992.</title>
      <pubDate>Fri, 01 Jan 1993 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217602968491</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217602968491</guid>
      <dc:format>Book</dc:format>
      <dc:date>1993</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Computer aided verification 5th international conference, CAV'93, Elounda, Greece, June 28-July 1, 1993.</title>
      <pubDate>Fri, 01 Jan 1993 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217602968496</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217602968496</guid>
      <dc:format>Book</dc:format>
      <dc:date>1993</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Embedded software verification and debugging</title>
      <pubDate>Sun, 01 Jan 2017 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217613117937</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217613117937</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2017</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Formal verification of control system software</title>
      <pubDate>Tue, 01 Jan 2019 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-8027390931312015096</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-8027390931312015096</guid>
      <author>Garoche, Pierre-Loïc</author>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2019</dc:date>
      <dc:creator>Garoche, Pierre-Loïc</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Languages, design methods, and tools for electronic system design selected contributions from FDL 2018</title>
      <pubDate>Wed, 01 Jan 2020 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217613975923</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217613975923</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2020</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Computer aided verification 23rd international conference, CAV 2011, Snowbird, UT, USA, July 14-20, 2011. proceedings</title>
      <pubDate>Sat, 01 Jan 2011 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611095360</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611095360</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2011</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Verification, model checking, and abstract interpretation 12th International Conference, VMCAI 2011, Austin, TX, USA, January 23-25, 2011, proceedings</title>
      <pubDate>Sat, 01 Jan 2011 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-99796217611190056</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-99796217611190056</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2011</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Verification, validation and testing in software engineering</title>
      <pubDate>Mon, 01 Jan 2007 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-1685594773862075176</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-1685594773862075176</guid>
      <dc:format>Electronic Resource</dc:format>
      <dc:date>2007</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Automated verification of Classical Soundness in Robustness Diagrams with Loop and Time Controls via L-safeness</title>
      <link>https://tuklas.up.edu.ph/Record/UP-8027390931312009061</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-8027390931312009061</guid>
      <author>Asoy, Andrei Luz B.</author>
      <dc:format>Thesis</dc:format>
      <dc:creator>Asoy, Andrei Luz B.</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Program verification</title>
      <pubDate>Wed, 01 Jan 1992 12:38:02 +0800</pubDate>
      <link>https://tuklas.up.edu.ph/Record/UP-1685594773861846375</link>
      <guid>https://tuklas.up.edu.ph/Record/UP-1685594773861846375</guid>
      <author>Francez, Nissim</author>
      <dc:format>Book</dc:format>
      <dc:date>1992</dc:date>
      <dc:creator>Francez, Nissim</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
  </channel>
</rss>
