Search Results - "Compilation."

101

Accelerating embedded Java for mobile devices.

Published in IEEE Communications magazine

Article

Accelerating embedded Java for mobile devices.

102

BPF+ exploiting global data-flow optimization in a generalized packet filter architecture. by Begel, Andrew

Published in Computer communication review.

Article

BPF+ exploiting global data-flow optimization in a generalized packet filter architecture.

103

Implementation of the phase 2 compiler for the ARM7TDMI-S Dual-Core microprocessor by Sebastian, Sherry Joy Alvionne

Thesis

104

An architecture and compiler for scalable on-chip communication. by Jian Liang

Published in IEEE Transactions on VLSI systems

Article

An architecture and compiler for scalable on-chip communication.

105

Overview of a compiler for synthesizing MATLAB programs onto FPGAs. by Banerjee, P.

Published in IEEE Transactions on VLSI systems

Article

Overview of a compiler for synthesizing MATLAB programs onto FPGAs.

106

Compiler-guided leakage optimization for banked scratch-pad memories. by Kandemir, M.

Published in IEEE Transactions on VLSI systems

Article

Compiler-guided leakage optimization for banked scratch-pad memories.

107

USC a universal stub compiler. by O'Malley, Sean

Published in Computer communication review.

Article

108

Optimizing a CORBA Internet inter-ORB protocol (IIOP) engine for minimal footprint embedded multimedia systems. by Gokhale, A.S

Published in IEEE Journal on selected areas in communications

Article

Optimizing a CORBA Internet inter-ORB protocol (IIOP) engine for minimal footprint embedded multimedia systems.

109

Timed compiled-code functional simulation of embedded software for performance analysis of SOC design. by Jong-Yeol Lee

Published in IEEE Transactions on computer-aided design of integrated circuits and systems

Article

Timed compiled-code functional simulation of embedded software for performance analysis of SOC design.

110

RS-FDRA A register-sensitive software pipelining algorithm for embedded VLIW processors. by Akturan, C.

Published in IEEE Transactions on computer-aided design of integrated circuits and systems

Article

Accelerating embedded Java for mobile devices.

BPF+ exploiting global data-flow optimization in a generalized packet filter architecture. by Begel, Andrew

Implementation of the phase 2 compiler for the ARM7TDMI-S Dual-Core microprocessor by Sebastian, Sherry Joy Alvionne

An architecture and compiler for scalable on-chip communication. by Jian Liang

Overview of a compiler for synthesizing MATLAB programs onto FPGAs. by Banerjee, P.

Compiler-guided leakage optimization for banked scratch-pad memories. by Kandemir, M.

USC a universal stub compiler. by O'Malley, Sean

Optimizing a CORBA Internet inter-ORB protocol (IIOP) engine for minimal footprint embedded multimedia systems. by Gokhale, A.S

Timed compiled-code functional simulation of embedded software for performance analysis of SOC design. by Jong-Yeol Lee

RS-FDRA A register-sensitive software pipelining algorithm for embedded VLIW processors. by Akturan, C.

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