Rezultaty 2.261 - 2.270 Rezultaty od 2.340 Dla wyszukiwania '"Circuit."', Czas wyszukiwania: 0,02s Redukuj rezultaty
  1. 2261

    Fast on-chip inductance simulation using a precorrected-FFT method. od Hu, H.

    Artykuł

    Fast on-chip inductance simulation using a precorrected-FFT method.
  2. 2262

    Timing constraints for domino logic gates with timing-dependent keepers. od Seong-Ook Jung

    Artykuł

    Timing constraints for domino logic gates with timing-dependent keepers.
  3. 2263

    Generalized traveling-wave-based waveform approximation technique for the efficient signal integrity verification of multicoupled transmission line system. od Yungseon Eo

    Artykuł

    Generalized traveling-wave-based waveform approximation technique for the efficient signal integrity verification of multicoupled transmission line system.
  4. 2264

    Implementation of a comprehensive and robust MOSFET model in cadence SPICE for ESD applications. od Gao, X.F

    Artykuł

    Implementation of a comprehensive and robust MOSFET model in cadence SPICE for ESD applications.
  5. 2265

    Design of hierarchical cellular automata for on-chip test pattern generator. od Sikdar, B.K

    Artykuł

    Design of hierarchical cellular automata for on-chip test pattern generator.
  6. 2266

    A timing-constrained simultaneous global routing algorithm. od Jiang Hu

    Artykuł

    A timing-constrained simultaneous global routing algorithm.
  7. 2267

    On the use of random limited-scan to improve at-speed random pattern testing of scan circuits. od Pomeranz, I.

    Artykuł

    On the use of random limited-scan to improve at-speed random pattern testing of scan circuits.
  8. 2268

    On the nonenumerative path delay fault simulation problem. od Kagaris, D.

    Artykuł

    On the nonenumerative path delay fault simulation problem.
  9. 2269

    Table look-up model of thin-film transistors for circuit simulation using spline interpolation with transformation by y x+log(x). od Kimura, M.

    Artykuł

    Table look-up model of thin-film transistors for circuit simulation using spline interpolation with transformation by y x+log(x).
  10. 2270

    Automatic test pattern generation for functional register-transfer level circuits using assignment decision diagrams. od Ghosh, I.

    Artykuł

    Automatic test pattern generation for functional register-transfer level circuits using assignment decision diagrams.

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