Dangos 1,931 - 1,940 canlyniadau o 2,340 ar gyfer chwilio '"Circuit."', amser ymholiad: 0.02e Mireinio'r Canlyniadau
  1. 1931

    High-speed demonstration of a superconducting pseudo-random bit-sequence generator. gan Wang, Z.

    Erthygl

    High-speed demonstration of a superconducting pseudo-random bit-sequence generator.
  2. 1932

    Chip-to-chip communication using a single flux quantum pulse. gan Maezawa, M.

    Erthygl

    Chip-to-chip communication using a single flux quantum pulse.
  3. 1933

    Efficient very large scale integration power gan Tan, S.X.-D

    Erthygl

    Efficient very large scale integration power
  4. 1934

    Reverse-order-restoration-based static test compaction for synchronous sequential circuits. gan Ruifeng Guo

    Erthygl

    Reverse-order-restoration-based static test compaction for synchronous sequential circuits.
  5. 1935

    Exact path delay fault coverage with fundamental ZBDD operations. gan Padmanaban, S.

    Erthygl

    Exact path delay fault coverage with fundamental ZBDD operations.
  6. 1936

    WATSON design space boundary exploration and model generation for analog and RFIC design. gan De Smedt, B.

    Erthygl

    WATSON design space boundary exploration and model generation for analog and RFIC design.
  7. 1937

    A CAD methodology for optimizing transistor current and sizing in analog CMOS design. gan Binkley, D.M

    Erthygl

    A CAD methodology for optimizing transistor current and sizing in analog CMOS design.
  8. 1938

    SubIslands the probabilistic match assignment algorithm for subcircuit recognition. gan Rubanov, N.

    Erthygl

    SubIslands the probabilistic match assignment algorithm for subcircuit recognition.
  9. 1939

    Static electromigration analysis for on-chip signal interconnects. gan Blaauw, D.T

    Erthygl

    Static electromigration analysis for on-chip signal interconnects.
  10. 1940

    SPIRIT a highly robust combinational test generation algorithm. gan Gizdarski, E.

    Erthygl

    SPIRIT a highly robust combinational test generation algorithm.

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