يعرض 1 - 10 نتائج من 70 نتيجة بحث عن '"CMOS technology."', وقت الاستعلام: 0.02s تنقيح النتائج
  1. 1

    A single-chip storage LSI for home networks.

    الحاوية / القاعدة IEEE Communications magazine
    مقال

    A single-chip storage LSI for home networks.
  2. 2

    A high-throughput low-cost AES processor. حسب Su, Chih-Pin

    الحاوية / القاعدة IEEE Communications magazine
    مقال

    A high-throughput low-cost AES processor.
  3. 3

    Implantable biomimetic microelectronic systems design. حسب Wentai Liu

    الحاوية / القاعدة IEEE Engineering in medicine and biology magazine
    مقال

    Implantable biomimetic microelectronic systems design.
  4. 4

    Low-voltage high-speed switched-capacitor circuits without voltage bootstrapper. حسب Lei Wang

    الحاوية / القاعدة IEEE Journal of solid state circuits
    مقال

    Low-voltage high-speed switched-capacitor circuits without voltage bootstrapper.
  5. 5

    A 3.3-V ISDN U-interface line driver with a new IQ-control circuit. حسب Jinup Lim

    الحاوية / القاعدة IEEE Journal of solid state circuits
    مقال

    A 3.3-V ISDN U-interface line driver with a new IQ-control circuit.
  6. 6

    A 40-GHz-bandwidth, 4-bit, time-interleaved A حسب Nathawad, L.Y

    الحاوية / القاعدة IEEE Journal of solid state circuits
    مقال

    A 40-GHz-bandwidth, 4-bit, time-interleaved A
  7. 7

    Discrete-time parametric amplification based on a three-terminal MOS varactor analysis and experimental results. حسب Ranganathan, S.

    الحاوية / القاعدة IEEE Journal of solid state circuits
    مقال

    Discrete-time parametric amplification based on a three-terminal MOS varactor analysis and experimental results.
  8. 8

    A 1-V transformer-feedback low-noise amplifier for 5-GHz wireless LAN in 0.18-μm CMOS. حسب Cassan, D.J

    الحاوية / القاعدة IEEE Journal of solid state circuits
    مقال

    A 1-V transformer-feedback low-noise amplifier for 5-GHz wireless LAN in 0.18-μm CMOS.
  9. 9

    Process and circuit design interlock for application-dependent scaling tradeoffs and optimization in the SoC era. حسب Diaz, C.H

    الحاوية / القاعدة IEEE Journal of solid state circuits
    مقال

    Process and circuit design interlock for application-dependent scaling tradeoffs and optimization in the SoC era.
  10. 10

    A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11a wireless LAN. حسب Vassiliou, I.

    الحاوية / القاعدة IEEE Journal of solid state circuits
    مقال

    A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11a wireless LAN.

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