Sökresultat - "CMOS technology."

11

MOS current mode circuits analysis, design, and variability. av Hassan, H.

I publikationen IEEE Transactions on VLSI systems

Artikel

12

Crosstalk noise reduction in synthesized digital logic circuits. av Milter, O.

I publikationen IEEE Transactions on VLSI systems

Artikel

13

Utilizing the effect of relative delay on energy dissipation in low-power on-chip buses. av Ghoneima, M.

I publikationen IEEE Transactions on VLSI systems

Artikel

14

A ±1-g dual-axis linear accelerometer in a standard 0.5-μm CMOS technology for high-sensitivity applications. av Baschirotto, A.

I publikationen IEEE Journal of solid state circuits

Artikel

15

The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture. av Noda, H.

I publikationen IEEE Journal of solid state circuits

Artikel

16

A 3.3-V ISDN U-interface line driver with a new IQ-control circuit. av Jinup Lim

I publikationen IEEE Journal of solid state circuits

Artikel

17

An image sensor with an in-pixel demodulation function for detecting the intensity of a modulated light signal. av Ohta, J.

I publikationen IEEE Transactions on electron devices

Artikel

18

A 0.5-V 1-μW successive approximation ADC. av Sauerbrey, J.

I publikationen IEEE Journal of solid state circuits

Artikel

19

A 9-GHz 65-nm Intel® Pentium 4 Processor Integer Execution Unit. av Wijeratne, S. B.

I publikationen IEEE Journal of solid state circuits

Artikel

20

Sleep switch dual threshold Voltage domino logic with reduced standby leakage current. av Kursun, V.

I publikationen IEEE Transactions on VLSI systems

Artikel

Sökresultat - "CMOS technology."

MOS current mode circuits analysis, design, and variability. av Hassan, H.

Crosstalk noise reduction in synthesized digital logic circuits. av Milter, O.

Utilizing the effect of relative delay on energy dissipation in low-power on-chip buses. av Ghoneima, M.

A ±1-g dual-axis linear accelerometer in a standard 0.5-μm CMOS technology for high-sensitivity applications. av Baschirotto, A.

The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture. av Noda, H.

A 3.3-V ISDN U-interface line driver with a new IQ-control circuit. av Jinup Lim

An image sensor with an in-pixel demodulation function for detecting the intensity of a modulated light signal. av Ohta, J.

A 0.5-V 1-μW successive approximation ADC. av Sauerbrey, J.

A 9-GHz 65-nm Intel® Pentium 4 Processor Integer Execution Unit. av Wijeratne, S. B.

Sleep switch dual threshold Voltage domino logic with reduced standby leakage current. av Kursun, V.

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