Sökresultat - "CMOS processes."

21

Pulsed current-mode signaling for nearly speed-of-light intrachip communication. av Jose, A.P

I publikationen IEEE Journal of solid state circuits

Artikel

22

A 1.4-V 10-bit 25-MS av Dong-Young Chang

I publikationen IEEE Journal of solid state circuits

Artikel

23

A 20-GHz phase-locked loop for 40-gb av Jaeha Kim

I publikationen IEEE Journal of solid state circuits

Artikel

24

Circuit and microarchitectural techniques for reducing cache leakage power. av Nam Sung Kim

I publikationen IEEE Transactions on VLSI systems

Artikel

25

A 1.2 GHz programmable DLL-based frequency multiplier for wireless applications. av Chua-Chin Wang

I publikationen IEEE Transactions on VLSI systems

Artikel

26

All Digital Spread Spectrum Clock Generator for EMI Reduction. av Damphousse, S.

I publikationen IEEE Journal of solid state circuits

Artikel

27

Substrate-triggered SCR device for on-chip ESD protection in fully silicided sub-0.25-μm CMOS process. av Ming-Dou Ker

I publikationen IEEE Transactions on electron devices

Artikel

28

A 0.13 μm CMOS front-end, for DCS1800/UMTS av Liscidini, A.

I publikationen IEEE Journal of solid state circuits

Artikel

29

A 256-Kb Dual-VCC SRAM Building Block in 65-nm CMOS Process With Actively Clamped Sleep Transistor. av Khellah, M.

I publikationen IEEE Journal of solid state circuits

Artikel

30

Adaptive-integration-time image sensor with real-time reconstruction function. av Yasuda, T.

I publikationen IEEE Transactions on electron devices

Artikel

Sökresultat - "CMOS processes."

Pulsed current-mode signaling for nearly speed-of-light intrachip communication. av Jose, A.P

A 1.4-V 10-bit 25-MS av Dong-Young Chang

A 20-GHz phase-locked loop for 40-gb av Jaeha Kim

Circuit and microarchitectural techniques for reducing cache leakage power. av Nam Sung Kim

A 1.2 GHz programmable DLL-based frequency multiplier for wireless applications. av Chua-Chin Wang

All Digital Spread Spectrum Clock Generator for EMI Reduction. av Damphousse, S.

Substrate-triggered SCR device for on-chip ESD protection in fully silicided sub-0.25-μm CMOS process. av Ming-Dou Ker

A 0.13 μm CMOS front-end, for DCS1800/UMTS av Liscidini, A.

A 256-Kb Dual-VCC SRAM Building Block in 65-nm CMOS Process With Actively Clamped Sleep Transistor. av Khellah, M.

Adaptive-integration-time image sensor with real-time reconstruction function. av Yasuda, T.

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