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161
On metrics for comparing interconnect estimation methods for FPGAs.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua -
162
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163
Leakage current reduction in CMOS VLSI circuits by input vector control.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua -
164
Gate oxide leakage current analysis and reduction for VLSI circuits.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua -
165
LECTOR a technique for leakage reduction in CMOS circuits.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua -
166
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167
A game theoretic approach for power optimization during behavioral synthesis.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua -
168
BDD decomposition for delay oriented pass transistor logic synthesis.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua -
169
Design and analysis of compact dictionaries for diagnosis in scan-BIST.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua -
170
Satisfaction, complaint, and the stock value gap.
Argitaratua izan da Journal of marketingArtikulua