Näytetään 141 - 150 yhteensä 171 tuloksesta haulle '"Benchmarking"', hakuaika: 0,02s Tarkenna hakua
  1. 141

    Efficient algorithms for multilevel power estimation of VLSI circuits. Tekijä Bachmann, W.W

    Artikkeli

    Efficient algorithms for multilevel power estimation of VLSI circuits.
  2. 142

    Sequence-switch coding for low-power data transmission. Tekijä Myungchul Yoon

    Artikkeli

    Sequence-switch coding for low-power data transmission.
  3. 143

    Placement constraints in floorplan design. Tekijä Young, E.F.Y

    Artikkeli

    Placement constraints in floorplan design.
  4. 144

    Tight integration of timing-driven synthesis and placement of parallel multiplier circuits. Tekijä Shin, K.

    Artikkeli

    Tight integration of timing-driven synthesis and placement of parallel multiplier circuits.
  5. 145

    Power minimization in QoS sensitive systems. Tekijä Wong, J.L

    Artikkeli

    Power minimization in QoS sensitive systems.
  6. 146

    Overview of a compiler for synthesizing MATLAB programs onto FPGAs. Tekijä Banerjee, P.

    Artikkeli

    Overview of a compiler for synthesizing MATLAB programs onto FPGAs.
  7. 147

    On-chip traffic modeling and synthesis for MPEG-2 video applications. Tekijä Varatkar, G.V

    Artikkeli

    On-chip traffic modeling and synthesis for MPEG-2 video applications.
  8. 148

    Note on generalization in experimental algorithmics. Tekijä Ramakrishnan, Naren

    Artikkeli

    Note on generalization in experimental algorithmics.
  9. 149

    Automatic interconnection rectification for SoC design verification based on the port order fault model. Tekijä Chun-Yao Wang

    Artikkeli

    Automatic interconnection rectification for SoC design verification based on the port order fault model.
  10. 150

    A timing-constrained simultaneous global routing algorithm. Tekijä Jiang Hu

    Artikkeli

    A timing-constrained simultaneous global routing algorithm.

Työkalut: