Отображение 8,111 - 8,120 результаты of 8,380 для поиска '"Architecture"', время запроса: 0.04сек. Отмена результатов
  1. 8111

    ATOMi An Algorithm for Circuit Partitioning Into Multiple FPGAs Using Time-Multiplexed, Off-Chip, Multicasting Interconnection Architecture. по Kwon, Y.-S

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    ATOMi An Algorithm for Circuit Partitioning Into Multiple FPGAs Using Time-Multiplexed, Off-Chip, Multicasting Interconnection Architecture.
  2. 8112

    Fast factorization architecture in soft-decision Reed-Solomon decoding. по Xinmiao Zhang

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    Fast factorization architecture in soft-decision Reed-Solomon decoding.
  3. 8113

    Parallel interleaver design and VLSI architecture for low-latency MAP turbo decoders. по Dobkin, R.

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    Parallel interleaver design and VLSI architecture for low-latency MAP turbo decoders.
  4. 8114

    VLSI architectural design tradeoffs for sliding-window log-MAP decoders. по Chien-Ming Wu

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    VLSI architectural design tradeoffs for sliding-window log-MAP decoders.
  5. 8115

    A forward body-biased low-leakage SRAM cache device, circuit and architecture considerations. по Kim, C.H

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    A forward body-biased low-leakage SRAM cache device, circuit and architecture considerations.
  6. 8116

    Design of a 3-D fully depleted SOI computational RAM. по Koob, J.C

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    Design of a 3-D fully depleted SOI computational RAM.
  7. 8117

    A "Flying-Adder" frequency synthesis architecture of reducing VCO stages. по Liming Xiu

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    A "Flying-Adder" frequency synthesis architecture of reducing VCO stages.
  8. 8118

    Prenormalization rounding in IEEE floating-point operations using a flagged prefix adder. по Burgess, N.

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    Prenormalization rounding in IEEE floating-point operations using a flagged prefix adder.
  9. 8119

    Routability checking for three-dimensional architectures. по Hung, W.N.N

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    Routability checking for three-dimensional architectures.
  10. 8120

    Is it possible to decorate graphical software design and architecture models with qualitative Information?-An experiment. по Bratthall, L.

    Опубликовано в: IEEE Transactions on software engineering
    Статья

    Is it possible to decorate graphical software design and architecture models with qualitative Information?-An experiment.

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