يعرض 7,681 - 7,690 نتائج من 8,380 نتيجة بحث عن '"Architecture"', وقت الاستعلام: 0.03s تنقيح النتائج
  1. 7681

    Architecture of a mediator for a bioinformatics database federation. حسب Kemp, G.J.L

    مقال

    Architecture of a mediator for a bioinformatics database federation.
  2. 7682

    OTE-TS - a new value-added telematics service for telemedicine applications. حسب Karavatselou, E.I

    مقال

    OTE-TS - a new value-added telematics service for telemedicine applications.
  3. 7683

    Detection of multiple sclerosis with visual evoked potentials - an unsupervised computational intelligence system. حسب Dasey, T.J

    مقال

    Detection of multiple sclerosis with visual evoked potentials - an unsupervised computational intelligence system.
  4. 7684

    Computer-supported collaborative work (CSCW) in biomedical signal visualization and processing. حسب Bouillon, Y.

    مقال

    Computer-supported collaborative work (CSCW) in biomedical signal visualization and processing.
  5. 7685

    Analysis of asymmetry in mammograms via directional filtering with Gabor wavelets. حسب Ferrari, R.J

    الحاوية / القاعدة IEEE Transactions on medical imaging
    مقال

    Analysis of asymmetry in mammograms via directional filtering with Gabor wavelets.
  6. 7686

    A VLSI architecture for watermarking in a secure still digital camera (S2DC) design. حسب Mohanty, S.P

    الحاوية / القاعدة IEEE Transactions on VLSI systems
    مقال

    A VLSI architecture for watermarking in a secure still digital camera (S2DC) design.
  7. 7687

    Reducing Measurement Uncertainty in a DSP-Based Mixed-Signal Test Environment Without Increasing Test Time. حسب Taillefer, C.S

    الحاوية / القاعدة IEEE Transactions on VLSI systems
    مقال

    Reducing Measurement Uncertainty in a DSP-Based Mixed-Signal Test Environment Without Increasing Test Time.
  8. 7688

    A novel FPGA architecture supporting wide, shallow memories. حسب Oldridge, S.W

    الحاوية / القاعدة IEEE Transactions on VLSI systems
    مقال

    A novel FPGA architecture supporting wide, shallow memories.
  9. 7689

    Layout conscious approach and bus architecture synthesis for hardware حسب Thepayasuwan, N.

    الحاوية / القاعدة IEEE Transactions on VLSI systems
    مقال

    Layout conscious approach and bus architecture synthesis for hardware
  10. 7690

    Schedule-aware performance estimation of communication architecture for efficient design space exploration. حسب Sungchan Kim

    الحاوية / القاعدة IEEE Transactions on VLSI systems
    مقال

    Schedule-aware performance estimation of communication architecture for efficient design space exploration.

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