-
1
-
2
-
3
ASIC design and synthesis RTL design using Verilog
Được phát hành 2021Also available remotely for the University of the Philippines System via SpringerLink. Click here to access thru EZproxy
Available for University of the Philippines System via SpringerLink. Click here to access
Electronic Resource -
4
-
5
-
6
-
7
Don'y buy gadgets yet, wait for specs, DepEd tells parents
Xuất bản năm Manila Bulletin (2020)Bài viết -
8
Eurocode 2 design data for reinforced concrete columns
Được phát hành 2019Available for University of the Philippines Diliman via SpringerLink. Click here to access
Also available remotely for University of the Philippines Diliman via SpringerLink. Click here to access thru EZproxy
Electronic Resource -
9
Digitally enhanced mixed signal systems
Được phát hành 2019Available for University of the Philippines Diliman via IET Digital Library. Click here to access
Also available remotely for University of the Philippines Diliman via IET Digital Library. Click here to access thru EZproxy
Electronic Resource -
10