VLSI physical design from graph partitioning to timing closure Yazar: Kahng, Andrew B. 1963-

Available for the University of the Philippines Diliman via SpringerLink. Click here to access

Timing analysis and simulation for signal integrity engineers Yazar: Edlund, Greg

Table of contents only

Skew-tolerant circuit design Yazar: Harris, David Money

Monolithic phase-locked loops and clock recovery circuits theory and design