Business process optimization through a web-based supplier information management system (SIMS) av Del Rosario, Janero

A 500-dpi AC capacitive hybrid flip-chip CMOS ASIC av Vermesan, O.

A bayesian approach to the analysis of split-plot combined and product arrays and optimization in robust parameter design. av Robinson, Timothy J.

Process optimization of vacuum-fried Philippine sweet potato (Ipomoea batatas L.) chips av De Guzman, Edward Peter B.

Available for University of the Philippines Diliman via Digital Archives. Click here to access