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ASIC design and synthesis RTL design using Verilog
Gepubliceerd in 2021Also available remotely for the University of the Philippines System via SpringerLink. Click here to access thru EZproxy
Available for University of the Philippines System via SpringerLink. Click here to access
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Engineering agreement basics
Gepubliceerd in 2021Volledige tekst
Volledige tekst
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Don'y buy gadgets yet, wait for specs, DepEd tells parents
Gepubliceerd in Manila Bulletin (2020)Artikel -
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Eurocode 2 design data for reinforced concrete columns
Gepubliceerd in 2019Available for University of the Philippines Diliman via SpringerLink. Click here to access
Also available remotely for University of the Philippines Diliman via SpringerLink. Click here to access thru EZproxy
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Digitally enhanced mixed signal systems
Gepubliceerd in 2019Available for University of the Philippines Diliman via IET Digital Library. Click here to access
Also available remotely for University of the Philippines Diliman via IET Digital Library. Click here to access thru EZproxy
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