Toon 1 - 4 resultaten van 4 Voor zoekopdracht '"CMOS standard cell."', zoektijd: 0,02s Verfijn jouw resultaten
  1. 1

    Area-efficient high-throughput MAP decoder architectures. door Seok-Jun Lee

    Artikel

    Area-efficient high-throughput MAP decoder architectures.
  2. 2

    Design and performance testing of a 2.29-GB door Verbauwhede, I.

    Artikel

    Design and performance testing of a 2.29-GB
  3. 3

    A 10-Gbps full-AES crypto design with a twisted BDD S-Box architecture. door Morioka, S.

    Artikel

    A 10-Gbps full-AES crypto design with a twisted BDD S-Box architecture.
  4. 4

    High-performance VLSI architecture of adaptive decision feedback equalizer based on predictive parallel branch slicer (PPBS) scheme. door Meng-Da Yang

    Artikel

    High-performance VLSI architecture of adaptive decision feedback equalizer based on predictive parallel branch slicer (PPBS) scheme.

Zoekinstrumenten: