検索結果 1 - 4 結果 / 4 検索語 '"CMOS logic circuits."', 処理時間: 0.02秒 結果の絞り込み
  1. 1

    Level-shifter free design of low power dual supply voltage CMOS circuits using dual threshold voltages. 著者: Diril, A.U

    論文

    Level-shifter free design of low power dual supply voltage CMOS circuits using dual threshold voltages.
  2. 2

    A self-controllable voltage level (SVL) circuit and its low-power high-speed CMOS circuit applications. 著者: Enomoto, T.

    論文

    A self-controllable voltage level (SVL) circuit and its low-power high-speed CMOS circuit applications.
  3. 3

    Power characteristics of inductive interconnect. 著者: El-Moursy, M.A

    論文

    Power characteristics of inductive interconnect.
  4. 4

    On circuit techniques to improve noise immunity of CMOS dynamic logic. 著者: Li Ding

    論文

    On circuit techniques to improve noise immunity of CMOS dynamic logic.

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