Showing 1 - 4 results of 4 for search '"CMOS standard cell."', सवाल का समय: 0.02सेकंड परिणाम को परिष्कृत करें
  1. 1

    Area-efficient high-throughput MAP decoder architectures. द्वारा Seok-Jun Lee

    में प्रकाशित IEEE Transactions on VLSI systems
    लेख

    Area-efficient high-throughput MAP decoder architectures.
  2. 2

    Design and performance testing of a 2.29-GB द्वारा Verbauwhede, I.

    में प्रकाशित IEEE Journal of solid state circuits
    लेख

    Design and performance testing of a 2.29-GB
  3. 3

    A 10-Gbps full-AES crypto design with a twisted BDD S-Box architecture. द्वारा Morioka, S.

    में प्रकाशित IEEE Transactions on VLSI systems
    लेख

    A 10-Gbps full-AES crypto design with a twisted BDD S-Box architecture.
  4. 4

    High-performance VLSI architecture of adaptive decision feedback equalizer based on predictive parallel branch slicer (PPBS) scheme. द्वारा Meng-Da Yang

    में प्रकाशित IEEE Transactions on VLSI systems
    लेख

    High-performance VLSI architecture of adaptive decision feedback equalizer based on predictive parallel branch slicer (PPBS) scheme.

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