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    Design of a 1.7-GHz low-power delay-fault-testable 32-b ALU in 180-nm CMOS technology. מאת Chatterjee, B.

    הוצא לאור ב IEEE Transactions on VLSI systems
    Article

    Design of a 1.7-GHz low-power delay-fault-testable 32-b ALU in 180-nm CMOS technology.

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