System Verilog assertions and functional coverage guide to language, methodology and applications Tekijä Mehta, Ashok B.

Available for University of the Philippines Diliman via SpringerLink. Click here to access
Also available remotely for University of the Philippines Diliman via SpringerLink. Click here to access thru EZproxy

SystemVerilog assertions and functional coverage guide to language, methodology and applications Tekijä Mehta, Ashok B.

Available for University of the Philippines System via SpringerLink. Click here to access
Also available remotely for University of the Philippines System via SpringerLink. Click here to access thru EZproxy

High speed digital design design of high speed interconnects and signaling Tekijä Zhang, Hanqiao, Krooswyk, Steven, Ou, Zhe-Yu Jeff

Arithmetic optimization techniques for hardware and software design Tekijä Kastner, Ryan

Finite state machine datapath design, optimization, and implementation Tekijä Davis, Justin S. 1975-

High-speed digital system design Tekijä Davis, Justin S. 1975-

Designing digital computer systems with Verilog Tekijä Lilja, David J.

Starter's guide to Verilog 2001 Tekijä Ciletti, Michael D.

High speed digital system design a handbook of interconnect theory and design practices Tekijä Hall, Stephen H.

Verilog digital system design Tekijä Navabi, Zainalabedin