Erakusten 1 - 10 emaitzak -- 11 bilaketa honetara '"Timing analysis."', Bilaketaren denbora: 0,02s Findu emaitzak
  1. 1

    Phase-time analysis of the leakage impulse current of faulty line-post pin insulators. nork Kim, C.J

    Artikulua

    Phase-time analysis of the leakage impulse current of faulty line-post pin insulators.
  2. 2

    Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design. nork Yu Cao

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design.
  3. 3

    Designing an asynchronous microcontroller using Pipefitter. nork Blunno, I.

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    Designing an asynchronous microcontroller using Pipefitter.
  4. 4

    Modeling subthreshold SOI logic for static timing analysis. nork Valentian, A.

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    Modeling subthreshold SOI logic for static timing analysis.
  5. 5

    Loop-based interconnect modeling and optimization approach for multigigahertz clock network design. nork Xuejue Huang

    Artikulua

    Loop-based interconnect modeling and optimization approach for multigigahertz clock network design.
  6. 6

    Efficient asynchronous bundled-data pipelines for DCT matrix-vector multiplication. nork Tugsinavisut, S.

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    Efficient asynchronous bundled-data pipelines for DCT matrix-vector multiplication.
  7. 7

    Compositional schedulability analysis of real-time systems using time Petri nets. nork Dianxiang Xu

    Artikulua

    Compositional schedulability analysis of real-time systems using time Petri nets.
  8. 8

    Timing constraints for domino logic gates with timing-dependent keepers. nork Seong-Ook Jung

    Artikulua

    Timing constraints for domino logic gates with timing-dependent keepers.
  9. 9

    Pattern generation for delay testing and dynamic timing analysis considering power-supply noise effects. nork Krstic, A.

    Artikulua

    Pattern generation for delay testing and dynamic timing analysis considering power-supply noise effects.
  10. 10

    Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits. nork Taskin, B.

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits.

Bilaketa egiteko lanabesak: