Erakusten 1 - 3 emaitzak -- 3 bilaketa honetara '"Synchronization circuits."', Bilaketaren denbora: 0,02s Findu emaitzak
  1. 1

    Cramer-Rao lower bounds for QAM phase and frequency estimation. nork Rice, F.

    Artikulua

    Cramer-Rao lower bounds for QAM phase and frequency estimation.
  2. 2

    Test pattern generation and partial-scan methodology for an asynchronous SoC interconnect. nork Efthymiou, A.

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    Test pattern generation and partial-scan methodology for an asynchronous SoC interconnect.
  3. 3

    Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits. nork Taskin, B.

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits.

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