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Interconnect accelerating techniques for sub-100-nm gigascale systems.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua -
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Power characteristics of inductive interconnect.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua -
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Exponentially tapered H-tree clock distribution networks.
Argitaratua izan da IEEE Transactions on VLSI systemsArtikulua