Erakusten 1 - 3 emaitzak -- 3 bilaketa honetara '"Power dissipation reduction."', Bilaketaren denbora: 0,04s Findu emaitzak
  1. 1

    An AI-calibrated IF filter a yield enhancement method with area and power dissipation reductions. nork Murakawa, M.

    Artikulua

    An AI-calibrated IF filter a yield enhancement method with area and power dissipation reductions.
  2. 2

    Bus-switch coding for reducing power dissipation in off-chip buses. nork Olivieri, M.

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    Bus-switch coding for reducing power dissipation in off-chip buses.
  3. 3

    A novel high-speed sense-amplifier-based flip-flop. nork Strollo, A.G.M

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    A novel high-speed sense-amplifier-based flip-flop.

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