Erakusten 1 - 2 emaitzak -- 2 bilaketa honetara '"Logic complexity."', Bilaketaren denbora: 0,02s Findu emaitzak
  1. 1

    Area-efficient high-throughput MAP decoder architectures. nork Seok-Jun Lee

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    Area-efficient high-throughput MAP decoder architectures.
  2. 2

    Bus encoding for total power reduction using a leakage-aware buffer configuration. nork Rao, R.R

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    Bus encoding for total power reduction using a leakage-aware buffer configuration.

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