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Design and implementation of pipelined analog-to-digital converters in a 90nm CMOS process
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Dizon, Aaron Galvez
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A 10-b 150-MSample/s 1.8-V 123-mW CMOS A
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Jong-Bum Park
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IEEE Journal of solid state circuits
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Low-power pipeline ADC for wireless LANs.
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Arias, J.
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IEEE Journal of solid state circuits
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A 1.4-V 10-bit 25-MS
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Dong-Young Chang
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IEEE Journal of solid state circuits
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A 12-bit 75-MS
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Murmann, B.
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Impact of capacitor dielectric relaxation on a 14-bit 70-MS
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Zanchi, A.
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IEEE Journal of solid state circuits
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A 14-bit digitally self-calibrated pipelined ADC with adaptive bias optimization for arbitrary speeds up to 40 MS
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Iizuka, K.
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CAMPUS
Diliman
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DATABASE
Union Catalog (Buklod)
7 results
7
UNIT LIBRARY
College of Engineering Library II
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CLASSIFICATION
L - Education
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SUBJECT
Analog-to-digital converters
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Design and construction
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Pipelined ADCs
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AUTHOR
Arias, J.
1 results
1
Dizon, Aaron Galvez
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Dong-Young Chang
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Fokno, Michelle Rosario
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Iizuka, K.
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Jong-Bum Park
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Murmann, B.
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Zanchi, A.
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