Search Results - "Hardware implementation."

1

Systematic IEEE rounding method for high-speed floating-point multipliers. by Quach, N.T

Published in IEEE Transactions on VLSI systems

Article

2

A digital vision chip specialized for high-speed target tracking. by Komuro, T.

Published in IEEE Transactions on electron devices

Article

3

A design methodology for networks of online modules and its application to the Levinson-Durbin algorithm. by Galli, R.

Published in IEEE Transactions on VLSI systems

Article

4

High-speed VLSI architectures for the AES algorithm. by Xinmiao Zhang

Published in IEEE Transactions on VLSI systems

Article

5

Characterization and modeling of in-building power lines for high-speed data transmission. by Tang, L.T

Published in IEEE Transactions on power delivery

Article

6

Design and implementation of low-energy turbo decoders. by Kaza, J.

Published in IEEE Transactions on VLSI systems

Article

7

Memory energy minimization by data compression algorithms, architectures and implementation. by Benini, L.

Published in IEEE Transactions on VLSI systems

Article

8

Architectures and protocols that enable new applications on opticalnetworks. by Veeraraghavan, M.

Published in IEEE Communications magazine

Article

9

Implementing scheduling algorithms in high-speed networks. by Stephens, D.C

Published in IEEE Journal on selected areas in communications

Article

10

Fast factorization architecture in soft-decision Reed-Solomon decoding. by Xinmiao Zhang

Published in IEEE Transactions on VLSI systems

Article

Search Results - "Hardware implementation."

Systematic IEEE rounding method for high-speed floating-point multipliers. by Quach, N.T

A digital vision chip specialized for high-speed target tracking. by Komuro, T.

A design methodology for networks of online modules and its application to the Levinson-Durbin algorithm. by Galli, R.

High-speed VLSI architectures for the AES algorithm. by Xinmiao Zhang

Characterization and modeling of in-building power lines for high-speed data transmission. by Tang, L.T

Design and implementation of low-energy turbo decoders. by Kaza, J.

Memory energy minimization by data compression algorithms, architectures and implementation. by Benini, L.

Architectures and protocols that enable new applications on opticalnetworks. by Veeraraghavan, M.

Implementing scheduling algorithms in high-speed networks. by Stephens, D.C

Fast factorization architecture in soft-decision Reed-Solomon decoding. by Xinmiao Zhang

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